In Joint Test Action Group (JTAG) applications, access to a System Under Test (SUT) is provided through application of vectors to a scan chain of the SUT. The vectors are serially applied to the standardized Test Access Port (TAP), which provides an interface to the scan chain of the SUT. The vectors represent the binary value of each bit in the scan chain. A typical test routine may include anywhere from a few vector bits to a large number of vector bits (e.g., hundreds, thousands, or even more). As a result, given that vector sets must be computed and serially applied to the TAP, the size of a vector set is an important consideration in testing for a SUT, especially in embedded applications. Furthermore, vectors are computed for a specific JTAG setup and, thus, need to be modified each time that the JTAG setup changes (an operation that is known as retargeting, which is quite onerous especially when the subsystem to retarget is complext). As a result, dynamic testing (e.g., situations where the vector inputs must be adapted “on the fly” based on the actual outputs) is limited because it requires a continuous retargeting of the entire scan chain and, similarly, use of dynamic topologies (e.g., where the length of the scan chain varies depending on the value of some elements) is limited as concurrent use of instruments is quite difficult because of the computational intesity associated with the required retargeting. Thus, although theoretically possible, the above-described problems make dynamic and portable testing unfeasible.